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There are several types of switch chips on Routerboards and they have a different sets of features. Most of them (from now on "Other") have only the basic "Port Switching" feature, but there are a few with more features:

Feature	QCA8337	Atheros8327	Atheros8316	Atheros8227	Atheros7240	IPQ-PPE	ICPlus175D	MT7621, MT7531	RTL8367	88E6393X	88E6191X, 88E6190	98PX1012	Other
Port Switching	yes	yes	yes	yes	yes	yes	yes	yes	yes	yes	yes	no	yes
Port Mirroring	yes	yes	yes	yes	yes	no	yes	yes	yes	yes	yes	no	no
TX limit ¹	yes	yes	yes	yes	yes	no	no	yes	yes	yes	yes	no	no
RX limit ¹	yes	yes	no	no	no	no	no	yes	yes	yes	yes	no	no
Host table	2048 entries	2048 entries	2048 entries	1024 entries	2048 entries	2048 entries	2048 entries ²	2048 entries	2048 entries	16k entries	16k entries	no	no
Vlan table	4096 entries	4096 entries	4096 entries	4096 entries	16 entries	no	no	4096 entries ³	4096 entries ³	4096 entries ³	4096 entries ³	no	no
Rule table	92 rules	92 rules	32 rules	no	no	no	no	no	no	256	no	no	no

Notes

For QCA8337, Atheros8327, Atheros8316, Atheros8227, and Atheros7240 the Tx/Rx rate limits can be changed with bandwidth property on "/interface ethernet" menu, see more details in the Ethernet manual. For RTL8367, 88E6393X, 88E6191X, 88E6190, MT7621 and MT7621 MT7531 Tx/Rx rate limit can be changed with egress-rate and ingress-rate properties on "/interface ethernet switch port" menu.
MAC addresses are learned up to the specified number, but the content of a switch host table is not available in RouterOS and static host configuration is not supported.
Bridge HW vlan-filtering was added in the RouterOS 7.1rc1 (for RTL8367) and 7.1rc5 (for MT7621) versions. The switch does not support other ether-type 0x88a8 or 0x9100 (only 0x8100 is supported) and no tag-stacking. Using these features will disable HW offload.

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RB5009UG+S+

RouterBoard	Switch-chip description
C52iG-5HaxD2HaxD-TC (hAP ax²), C53UiG+5HPaxD2HPaxD (hAP ax³), Chateau ax series	IPQ-PPE (ether1-ether5)
cAPGi-5HaxD2HaxD (cAP ax)	IPQ-PPE (ether1-ether2)
L009 series	88E6190 (ether2-ether8, sfp1)
RB5009 series	88E6393X (ether1-ether8, sfp-sfpplus1)
CCR2004-16G-2S+	88E6191X (ether1-ether8); 88E6191X (ether9-ether16);
RB4011iGS+	RTL8367 (ether1-ether5); RTL8367 (ether6-ether10);
RB1100AHx4	RTL8367 (ether1-ether5); RTL8367 (ether6-ether10); RTL8367 (ether11-ether13)
L41G-2axD (hAP ax lite)	MT7531 (ether1-ether4)
RB750Gr3 (hEX), RB760iGS (hEX S)	MT7621 (ether1-ether5)
RBM33G	MT7621 (ether1-ether3)
RB3011 series	QCA8337 (ether1-ether5); QCA8337 (ether6-ether10)
RB OmniTik ac series	QCA8337 (ether1-ether5)
RBwsAP-5Hac2nD (wsAP ac lite)	Atheros8227 (ether1-ether3)
RB941-2nD (hAP lite)	Atheros8227 (ether1-ether4)
RB951Ui-2nD (hAP); RB952Ui-5ac2nD (hAP ac lite); RB750r2 (hEX lite); RB750UPr2 (hEX PoE lite); RB750P-PBr2 (PowerBox); RB750P r2; RBOmniTikU-5HnDr2 (OmniTIK 5); RBOmniTikUPA-5HnDr2 (OmniTIK 5 PoE)	Atheros8227 (ether1-ether5)
RB750Gr2 (hEX); RB962UiGS-5HacT2HnT (hAP ac); RB960PGS (hEX PoE); RB960PGS-PB (PowerBox Pro)	QCA8337 (ether1-ether5)
RB953GS	Atheros8327 (ether1-ether3+sfp1)
RB850Gx2	Atheros8327 (ether1-ether5) with ether1 optional
RB2011 series	Atheros8327 (ether1-ether5+sfp1); Atheros8227 (ether6-ether10)
RB750GL; RB751G-2HnD; RB951G-2HnD; RBD52G-5HacD2HnD (hAP ac²), RBD53iG-5HacD2HnD (hAP ac³), RBD53GR-5HacD2HnD&R11e-LTE6 (hAP ac³ LTE6 kit), RBD53G-5HacD2HnD-TC&EG12-EA (Chateau LTE12)	Atheros8327 (ether1-ether5)
RBcAPGi-5acD2nD (cAP ac), RBwAPGR-5HacD2HnD (wAP R ac and wAP ac LTE series), RBwAPG-5HacD2HnD (wAP ac), RBD25G-5HPacQD2HPnD (Audience), RBD25GR-5HPacQD2HPnD&R11e-LTE6 (Audience LTE6 kit),	Atheros8327 (ether1-ether2)
RBD22UGS-5HPacD2HnD (mANTBox 52 15s)	Atheros8327 (ether1-sfp1)
RB1100AH	Atheros8327 (ether1-ether5); Atheros8327 (ether6-ether10)
RB1100AHx2	Atheros8327 (ether1-ether5); Atheros8327 (ether6-ether10)
CCR1009-8G-1S-1S+; CCR1009-8G-1S	Atheros8327 (ether1-ether4)
RB493G	Atheros8316 (ether1+ether6-ether9); Atheros8316 (ether2-ether5)
RB435G	Atheros8316 (ether1-ether3) with ether1 optional
RB450G	Atheros8316 (ether1-ether5) with ether1 optional
RB450Gx4	Atheros8327 (ether1-ether5)
RB433GL	Atheros8327 (ether1-ether3)
RB750G	Atheros8316 (ether1-ether5)
RB1200	Atheros8316 (ether1-ether5)
RB1100	Atheros8316 (ether1-ether5); Atheros8316 (ether6-ether10)
DISC Lite5	Atheros8227 (ether1)
RBmAP2nD	Atheros8227 (ether1-ether2)
RBmAP2n	Atheros7240 (ether1-ether2)
RB750	Atheros7240 (ether2-ether5)
RB750UP	Atheros7240 (ether2-ether5)
RB751U-2HnD	Atheros7240 (ether2-ether5)
RB951-2n	Atheros7240 (ether2-ether5)
RB951Ui-2HnD	Atheros8227 (ether1-ether5)
RB433 series	ICPlus175D (ether2-ether3); older models had ICPlus175C
RB450	ICPlus175D (ether2-ether5); older models had ICPlus175C
RB493 series	ICPlus178C (ether2-ether9)
RB816	ICPlus178C (ether1-ether16)

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Code Block

language	ros

[admin@MikroTik] > /interface ethernet switch print 
Flags: I - invalid 
 #   NAME         TYPE             MIRROR-SOURCE       MIRROR-TARGET       SWITCH-ALL-PORTS
 0   switch1      Atheros-8327     none                none               
 1   switch2      Atheros-8227     none                none

Depending on the switch type there might be available or not available some can be different configuration capabilities available.

Features

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Port Switching

In order to To set up port switching on non-CRS series devices, check the Bridge Hardware Offloading page.

Note
Port switching in RouterOS v6.41 and newer is done using the bridge configuration. Prior to Before RouterOS v6.41 port switching was done using the master-port property.

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Ether1 port on RB450G/RB435G/RB850Gx2 devices has a feature that allows it to be removed/added to the default switch group, this setting is available on the /interface ethernet switch switch menu. By default ether1 port will be included in the switch group.

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Property	Description
mirror-source (name \| none; Default: none)	Selects a single mirroring source port. Ingress and egress traffic will be sent to the `mirror-target` port. Note that `mirror-target` port has to belong to the same switch (see which port belongs to which switch in `/interface ethernet` menu).
mirror-target (name \| none \| cpu; Default: none)	Selects a single mirroring target port. Mirrored packets from `mirror-source` and `mirror` (see the property in rule and host table) will be sent to the selected port.
mirror-egress-target (name \| none; Default: none)	Selects a single mirroring egress target port, only available on 88E6393X, 88E6191X and 88E6191X 88E6190 switch chips. Mirrored packets from `mirror-egress` (see the property in port menu) will be sent to the selected port.

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Property	Description
mirror-egress (no \| yes; Default: no)	Whether to send egress packet copy to the `mirror-egress-target` port, only available on 88E6393X and 88E6191X switch , 88E6191X and 88E6190 switch chips.
mirror-ingress (no \| yes; Default: no)	Whether to send ingress packet copy to the `mirror-ingress-target` port, only available on 88E6393X and 88E6191X switch , 88E6191X and 88E6190 switch chips.
mirror-ingress-target (name \| none; Default: none)	Selects a single mirroring ingress target port, only available on 88E6393X and 88E6191X switch , 88E6191X and 88E6190 switch chips. Mirrored packets from `mirror-ingress` will be sent to the selected port.

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Code Block

language	ros

/interface ethernet switch
set switch1 mirror-source=ether2 mirror-target=ether3

Warning
If you set mirror-source as an Ethernet port for a device with at least two switch chips and these mirror-source ports are in a single bridge while mirror-target for both switch chips are set to send the packets to the CPU, then this will result in a loop, which can make your device inaccessible.

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Warning

Ingress traffic is considered as traffic that is being sent IN a certain port, this port is sometimes called ingress port. Egress traffic is considered as traffic that is being sent OUT of a certain port, this port is sometimes called egress port. Distinguishing them is very important in order to properly set up VLAN filtering since some properties apply only to either ingress or egress traffic.

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Property	Description
vlan-mode (check \| disabled \| fallback \| secure; Default: disabled)	Changes the VLAN lookup mechanism against the VLAN Table for ingress traffic. `disabled` - disables checking against the VLAN Table completely for ingress traffic. No traffic is dropped when set on the ingress port. `fallback` - checks tagged traffic against the VLAN Table for ingress traffic , and forwards all untagged traffic. If ingress traffic is tagged and the egress port is not found in the VLAN table for the appropriate VLAN ID, then traffic is dropped. If a VLAN ID is not found in the VLAN Table, then traffic is forwarded. Used to allow known VLANs only in specific ports. `check` - checks tagged traffic against the VLAN Table for ingress traffic and drops all untagged traffic. If ingress traffic is tagged and the egress port is not found in the VLAN table for the appropriate VLAN ID, then traffic is dropped. `secure` - checks tagged traffic against the VLAN Table for ingress traffic and drops all untagged traffic. Both ingress and egress port must be found in the VLAN Table for the appropriate VLAN ID, otherwise, traffic is dropped.
vlan-header (add-if-missing \| always-strip \| leave-as-is; Default: leave-as-is)	Sets action which is performed on the port for egress traffic. `add-if-missing` - adds a VLAN tag on egress traffic and uses default-vlan-id from the ingress port. Should be used for trunk ports. `always-strip` - removes a VLAN tag on egress traffic. Should be used for access ports. `leave-as-is` - does not add nor remove a VLAN tag on egress traffic. Should be used for hybrid ports.
default-vlan-id (auto \| integer: 0..4095; Default: auto)	Adds a VLAN tag with the specified VLAN ID on all untagged ingress traffic on a port, should be used with vlan-header set to `always-strip` on a port to configure the port to be the access port. For hybrid ports default-vlan-id id is used to tag untagged traffic. If two ports have the same default default-vlan-id, then VLAN tag is not added since the switch chip assumes that traffic is being forwarded between access ports.

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Note
On QCA8337 and Atheros8327 switch chips, a default `vlan-header=leave-as-is` property should be used. The switch chip will determine which ports are access ports by using the `default-vlan-id` property. The `default-vlan-id` should only be used on access/hybrid ports to specify which VLAN the untagged ingress traffic is assigned to.

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Packets without VLAN tag are treated just like as if they had a VLAN tag with port default-vlan-id. If vlan-mode=check or vlan=mode=secure is configured, in order to forward packets without VLAN tags you have to add an entry to the VLAN table with the same VLAN ID according to default-vlan-id.

Property	Description
disabled (no \| yes; Default: no)	Enables or disables switch VLAN entry.
independent-learning (no \| yes; Default: yes)	Whether to use shared-VLAN-learning (SVL) or independent-VLAN-learning (IVL).
ports (name; Default: none)	Interface member list for the respective VLAN. This setting accepts comma-separated values. e.g. `ports=ether1,ether2`.
switch (name; Default: none)	Name of the switch for which the respective VLAN entry is intended for.
vlan-id (integer: 0..4095; Default:)	The VLAN ID for certain switch port configurations.

Note
Devices with MT7621, MT7531, RTL8367, 88E6393X, 88E6191X, 88E6190 switch chips support support HW offloaded vlan-filtering in RouterOS v7. VLAN-related configuration on the "/interface ethernet switchswitch" menu is not available.

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Both vlan-mode and vlan-header along with the VLAN Table can be used to configure VLAN tagging, untagging and filtering, there are multiple combinations that are possible, each achieving a different result. Below you can find a table of what kind of traffic is going to be sent out through an egress port when a certain traffic is received on an ingress port for each VLAN Mode.

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Note
The tables above are meant for more advanced configurations and to double-check your own understanding of how packets will be processed with each VLAN related property.

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Property	Description
copy-to-cpu (no \| yes; Default: no)	Whether to send a frame copy to switch CPU port from a frame with a matching MAC destination address (matching destination or source address for CRS3xx series switches)
drop (no \| yes; Default: no)	Whether to drop a frame with a matching MAC source address received on a certain port (matching destination or source address for CRS3xx series switches)
mac-address (MAC; Default: 00:00:00:00:00:00)	Host's MAC address
mirror (no \| yes; Default: no)	Whether to send a frame copy to `mirror-target` port from a frame with a matching MAC destination address (matching destination or source address for CRS3xx series switches)
ports (name; Default: none)	Name of the interface, static MAC address can be mapped to more that than one port, including switch CPU port
redirect-to-cpu (no \| yes; Default: no)	Whether to redirect a frame to switch CPU port from a frame with a matching MAC destination address (matching destination or source address for CRS3xx series switches)
share-vlan-learned (no \| yes; Default: no)	Whether the static host MAC address lookup is used with shared-VLAN-learning (SVL) or independent-VLAN-learning (IVL). The SVL mode is used for those VLAN entries that do not support IVL or IVL is disabled (independent-learning=no)
switch (name; Default: none)	Name of the switch to which the MAC address is going to be assigned to
vlan-id (integer: 0..4095; Default:)	VLAN ID for the statically added MAC address entry

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Note

Every switch chip has a finite number of MAC addresses it can store on the chip, see the Introduction table for a specific host table size. Once a host table is completely full, different techniques can be utilized to cope with the situation, for example, the switch can remove older entries to free space for more recent MAC addresses (used on QCA-8337 and Atheros-8327 switch chips), another option is to simply ignore the new MAC addresses and only remove entries after a timeout has passed (used on Atheros8316, Atheros8227, Atheros-7240, ICPlus175D ICPlus175D and Realtek-RTL8367 switch chips), the last option is a combination of the previous two - only allow a certain amount of entries to be renewed and keep the other host portion intact till the timeout (used on MediaTek-MT7621, MT7531 switch chip). These techniques cannot be changed with configuration.

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Warning

For Atheros8316, Atheros8227 and Atheros-7240 switch chips, the switch-cpu port will always participate in the host learning process when at least one hardware offloaded bridge port is active on the switching group. It will cause the switch-cpu port to learn MAC addresses from non-HW offloaded interfaces. This might cause a packet loss when a single bridge contains HW and non-HW offloaded interfaces. Also, packet loss might appear when a duplicate MAC address is used on the same switching group regardless if hosts are located on different logical networks. It is recommended to use HW offloading on only when all switch bridge ports can use HW offloaded or keep it disabled on all switch ports when one or more bridge ports cannot be configured with HW offloading.

Rule Table

Rule table is a very powerful tool allowing wire-speed packet filtering, forwarding and VLAN tagging based on L2, L3 and L4 protocol header field conditionconditions. The menu contains an ordered list of rules just like in /ip firewall filter, so ACL rules are checked for each packet until a match has been found. If there are multiple rules that can match, then only the first rule will be triggered. A rule without any action parameters is a rule to accept the packet.

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Property	Description
copy-to-cpu (no \| yes; Default: no)	Whether to send a packet copy to switch CPU port
mirror (no \| yes; Default: no)	Whether to send a packet copy to `mirror-target` port
new-dst-ports (name; Default: none)	Changes the destination port as specified, multiple ports allowed, including a switch CPU port. An empty setting will drop the packet. When the parameter is not used, the packet will be accepted
new-vlan-id (integer: 0..4095)	Changes the VLAN ID to the specified value or adds a new VLAN tag if one was not already present (the property only applies to the Atheros8316, and 88E6393X switch chipchips)
new-vlan-priority (integer: 0..7)	Changes the VLAN priority field field (priority code point, the property only applies to Atheros8327, QCA8337 and Atheros8316 switch chips)
rate (integer: 0..4294967295)	Sets ingress traffic limitation (bits per second) for matched traffic, can only be applied to the first 32 rule slots (the property only applies to Atheros8327/QCA8337 switch chips)
redirect-to-cpu (no \| yes; Default: no)	Changes the destination port of a matching packet to the switch CPU

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Property	Description
disabled (no \| yes; Default: no)	Enables or disables switch rule
dscp (integer: 0..63)	Matching DSCP field of the packet
dst-address (IP address/Mask)	Matching destination IP address and mask
dst-address6 (IPv6 address/Mask)	Matching destination IPv6 address and mask
dst-mac-address (MAC address/Mask)	Matching destination MAC address and mask
dst-port (integer: 0..65535)	Matching destination protocol port number or range
flow-label (integer: 0..1048575)	Matching IPv6 flow label
mac-protocol (802.2 \| arp \| homeplug-av \| ip \| ipv6 \| ipx \| lldp \| loop-protect \| mpls-multicast \| mpls-unicast \| packing-compr \| packing-simple \| pppoe \| pppoe-discovery \| rarp \| service-vlan \| vlan \| or 0..65535 \| or 0x0000-0xffff)	Matching particular MAC protocol specified by protocol name or number (skips VLAN tags if any)
ports (name)	Name of the interface on which the rule will apply on the received traffic, multiple ports are allowed
protocol (dccp \| ddp \| egp \| encap \| etherip \| ggp \| gre \| hmp \| icmp \| icmpv6 \| idpr-cmtp \| igmp \| ipencap \| ipip \| ipsec-ah \| ipsec-esp \| ipv6 \| ipv6-frag \| ipv6-nonxt \| ipv6-opts \| ipv6-route \| iso-tp4 \| l2tp \| ospf \| pim \| pup \| rdp \| rspf \| rsvp \| sctp \| st \| tcp \| udp \| udp-lite \| vmtp \| vrrp \| xns-idp \| xtp \| or 0..255)	Matching particular IP protocol specified by protocol name or number
src-address (IP address/Mask)	Matching source IP address and mask
src-address6 (IPv6 address/Mask)	Matching source IPv6 address and mask
src-mac-address (MAC address/Mask)	Matching source MAC address and mask
src-port (0..65535)	Matching source protocol port number or range
switch (switch group)	Matching switch group on which will the rule apply
traffic-class (0..255)	Matching IPv6 traffic class
vlan-id (0..4095)	Matching VLAN ID (the property only applies to theAtheros8316, Atheros8327, QCA8337, 88E6393X switch chips)
vlan-header (not-present \| present)	Matching VLAN header, whether the VLAN header is present or not (the property only applies to the Atheros8316, Atheros8327, QCA8337, 88E6393X switch chips)
vlan-priority (0..7)	Matching VLAN priority (priority code point)

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Note
IPv4 and IPv6 specific conditions cannot be present in the same rule.

Note

Due to Because the fact that the rule table is processed entirely in switch chips hardware, there is a limitation to how many rules you may have. Depending on the number of conditions (MAC layer, IP layer, IPv6, L4 layer) you use in your rules, the number of active rules may vary from 8 to 32 for Atheros8316 switch chip, from 24 to 96 for Atheros8327/QCA8337 switch chip and from 42 to 256 for 88E6393X switch chip. You can always dodo /interface ethernet switch rule print print after modifying your rule set to see that no rules at the end of the list are 'invalid' which means those rules did not fit into the switch chip.

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Warning
The `forwarding-override` property that has an effect on affects ingress traffic only. Switch ports that do not have the `forwarding-override` specified are able to can send packets through all switch ports.

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Warning

Switch chips with a VLAN table support (QCA8337, Atheros8327, Atheros8316, Atheros8227 and Atheros7240) can override the port isolation configuration when enabling a VLAN lookup on the switch port (thevlan-mode is set to fallback, check or secure). If additional port isolation is needed between ports on the same VLAN, a switch rule with a new-dst-ports property can be implemented. Other devices without switch rule support cannot overcome this limitation.

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In some scenarios you might need to isolate a group of devices from other groups, this can be done using the switch port isolation feature. This is useful when you have multiple networks but you want to use a single switch, with port isolation you can allow certain switch ports to be able to communicate through only a set of switch ports. In this example, devices on ether1-3 will only be able to communicate with devices that are on ether1-3, while devices on ether4-5 will only be able to communicate with devices on ether4-5 (ether1-3 is not able to communicate with ether4-5)

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Note
By default, the bridge interface is configured with `protocol-mode` set to `rstp`. For some devices, this can disable hardware offloading because specific switch chips do not support this feature. See the Bridge Hardware Offloading section with supported features.

Then specify in the forwarding-override property all ports that you want to be in the same isolated switch group (except the port on which you are applying the property), for example, to create an isolated switch group for A devices:

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All switch chips have a special port that is called switchX-cpu, this is the CPU port for a switch chip, it is meant to forward traffic from a switch chip to the CPU, such a port is required for management traffic and for routing features. By default the switch chip ensures that this special CPU port is not congested and sends out Pause Frames when link capacity is exceeded to make sure the port is not oversaturated, this feature is called CPU Flow Control. Without this feature packets that might be crucial for routing or management purposes might get dropped.

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Some switch chips are capable of reporting statistics, this can be useful to monitor how many packets are sent to the CPU from the built-in switch chip. These statistics can also be used to monitor CPU Flow Control. You can find an example of the switch chip's statistics below:

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Some devices have multiple CPU cores that are directly connected to a built-in switch chip using separate data lanes. These devices can report which data lane was used to forward the packet from or to the CPU port from the switch chip. For such devices an extra line is added for each row, the first line represents data that was sent using the first data lane, the second line represents data that was sent using the second data line, and so on. You can find an example of the switch chip's statistics for a device with multiple data lanes connecting the CPU and the built-in switch chip:

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Note
Make sure you have added all needed interfaces to the VLAN table when using secure `vlan-mode`. For routing functions to work properly on the same device through ports that use secure `vlan-mode`, you will need to allow access to the CPU from those ports, this can be done by adding the switchX-cpu interface itself to the VLAN table. Examples can be found at the in the Management port section.

Note
It is possible to use the built-in switch chip and the CPU at the same time to create a Switch-Router setup, where a device acts as a switch and as a router at the same time. You can find a configuration example in the Switch-Router guide.

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Warning
When allowing access to the CPU, you are allowing access from a certain port to the actual router/switch, this is not always desirable. Make sure you implement proper firewall filter rules to secure your device when access to the CPU is allowed from a certain VLAN ID and port, use firewall filter rules to allow access to only certain services.

Note
Devices with MT7621, MT7531, RTL8367, 88E6393X, 88E6191X, 88E6190 switch chips support HW offloaded vlan-filtering in RouterOS v7. VLAN-related configuration on the "/interface ethernet switch" menu is not available.

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RouterBOARDs with Atheros switch chips can be used for 802.1Q Trunking. This feature in RouterOS v6 is supported by QCA8337, Atheros8316, Atheros8327, Atheros8227 and Atheros7240 switch chips. In this example, ether3, ether4, and ether5 interfaces are access ports, while ether2 is a trunk port. VLAN IDs for each access port: ether3 - 400, ether4 - 300, ether5 - 200.

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Code Block

language	ros

/interface ethernet switch port
set ether2 vlan-mode=secure vlan-header=add-if-missing
set ether3 vlan-mode=secure vlan-header=always-strip default-vlan-id=200
set ether4 vlan-mode=secure vlan-header=always-strip default-vlan-id=300
set ether5 vlan-mode=secure vlan-header=always-strip default-vlan-id=400

Setting vlan-mode=secure ensures strict use of the VLAN table.
Setting vlan-header=always-strip for access ports removes the VLAN header from the frame when it leaves the switch chip.
Setting vlan-header=add-if-missing for trunk port adds VLAN header to untagged frames.
default-vlan-id specifies what VLAN ID is added for untagged ingress traffic of the access port.

Note
On QCA8337 and Atheros8327 switch chips, a default `vlan-header=leave-as-is` property should be used. The switch chip will determine which ports are access ports by using the `default-vlan-id` property. The `default-vlan-id` should only be used on access/hybrid ports to specify which VLAN the untagged ingress traffic is assigned to.

VLAN Example 2 (Trunk and Hybrid Ports)

VLAN Hybrid ports which can forward both tagged and untagged traffic. This configuration is supported only by some Gigabit switch chips (QCA8337, Atheros8327).

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Note
By default, the bridge interface is configured with `protocol-mode` set to `rstp`. For some devices, this can disable hardware offloading because specific switch chips do not support this feature. See the Bridge Hardware Offloading section with supported features.

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Code Block

language	ros

/interface ethernet switch vlan
add ports=ether2,ether3,ether4,ether5 switch=switch1 vlan-id=200
add ports=ether2,ether3,ether4,ether5 switch=switch1 vlan-id=300
add ports=ether2,ether3,ether4,ether5 switch=switch1 vlan-id=400

In the switch port menu set vlan-mode on all ports and also default-vlan-id on planned hybrid ports:

Code Block

language	ros

/interface ethernet switch port
set ether2 vlan-mode=secure vlan-header=leave-as-is
set ether3 vlan-mode=secure vlan-header=leave-as-is default-vlan-id=200
set ether4 vlan-mode=secure vlan-header=leave-as-is default-vlan-id=300
set ether5 vlan-mode=secure vlan-header=leave-as-is default-vlan-id=400

vlan-mode=secure will ensure strict use of the VLAN table.
default-vlan-id will define VLAN for untagged ingress traffic on the port.
In QCA8337 and Atheros8327 chips when vlan-mode=securesecure is used, it ignores switch port vlan-header options. VLAN table entries handle all the egress tagging/untagging and works as vlan-header=leave-as-is on all ports. It means what comes in tagged, goes out tagged as well, only default-vlan-id frames are untagged at the egress port.

Management access configuration

In these examples, there will be shown examples for multiple scenarios, but each of these scenarios require requires you to have switched ports. Below you can find how to switch multiple ports:

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Note
By default, the bridge interface is configured with `protocol-mode` set to `rstp`. For some devices, this can disable hardware offloading because specific switch chips do not support this feature. See the Bridge Hardware Offloading section with supported features.

In these examples, it will be assumed that ether1 is the trunk port and ether2 is the access port, for configuration as the following:

Code Block

language	ros

/interface ethernet switch port
set ether1 vlan-header=add-if-missing
set ether2 default-vlan-id=100 vlan-header=always-strip
/interface ethernet switch vlan
add ports=ether1,ether2,switch1-cpu switch=switch1 vlan-id=100

Tagged

In order to To make the device accessible only from a certain VLAN, you need to create a new VLAN interface on the bridge interface and assign an IP address to it:

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Note
Only specify trunk ports in this VLAN table entry, it is not possible to allow access to the CPU with tagged traffic through an access port since the access port will tag all ingress traffic with the specified `default-vlan-id` value.

When the VLAN table is configured, you can enable vlan-mode=secure to limit access to the CPU:

Code Block

language	ros

/interface ethernet switch port
set ether1 vlan-header=add-if-missing vlan-mode=secure
set ether2 default-vlan-id=100 vlan-header=always-strip vlan-mode=secure
set switch1-cpu vlan-header=leave-as-is vlan-mode=secure

Untagged

In order to To make the device accessible from the access port, create a VLAN interface with the same VLAN ID as set in default-vlan-id, for example, VLAN 100, and add an IP address to it:

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Warning
Most commonly an access (untagged) port is accompanied with by a trunk (tagged) port. In case of untagged access to the CPU, you are forced to specify both the access port and the trunk port, this gives access to the CPU from the trunk port as well. Not always this is desired and a Firewall might be required on top of VLAN filtering.

When the VLAN table is configured, you can enable vlan-mode=secure to limit access to the CPU:

Code Block

language	ros

/interface ethernet switch port
set ether1 vlan-header=add-if-missing vlan-mode=secure
set ether2 default-vlan-id=100 vlan-header=always-strip vlan-mode=secure
set switch1-cpu vlan-header=leave-as-is vlan-mode=secure

Note
To setup the management port using untagged traffic on a device with the Atheros7240 switch chip, you will need to set `vlan-header=add-if-missingmissing` for the CPU port.

Untagged from tagged port

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Specify which ports are allowed to access the CPU. Use vlan-id that is used in default-vlan-id for switch-cpu and trunk ports, by default it is set to 0 or 1.

Code Block

language	ros

/interface ethernet switch vlan
add ports=ether1,switch1-cpu switch=switch1 vlan-id=1

When the VLAN table is configured, you can enable vlan-mode=secure to limit access to the CPU:

Code Block

language	ros

/interface ethernet switch port
set ether1 default-vlan-id=1 vlan-header=add-if-missing vlan-mode=secure
set switch1-cpu default-vlan-id=1 vlan-header=leave-as-is vlan-mode=secure

Note

This configuration example is not possible for devices with the Atheros8316 and Atheros7240 switch chips. For devices with QCA8337 and Atheros8327 switch chips, it is possible to use any other default-vlan-id as long as it stays the same on switch-cpu and trunk ports. For devices with Atheros8227 switch chip only default-vlan-id=0 can be used and the trunk port must use vlan-header=leave-as-is.

Inter-VLAN routing

Many MikroTik's devices come with a built-in switch chip that can be used to greatly improve overall throughput when configured properly. Devices with a switch chip can be used as a router and a switch at the same time, this gives you the possibility to use a single device instead of multiple devices for your network.

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Add each port to the VLAN table and allow these ports to access the CPU in order to make DHCP and routing work:

Code Block

language	ros

/interface ethernet switch vlan
add independent-learning=yes ports=ether2,switch1-cpu switch=switch1 vlan-id=10
add independent-learning=yes ports=ether3,switch1-cpu switch=switch1 vlan-id=20

Specify each port to be as an access port, and enable secure VLAN mode on each port and on the switch1-cpu port:

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Note
On QCA8337 and Atheros8327 switch chips, a default `vlan-header=leave-as-is` property should be used. The switch chip will determine which ports are access ports by using the `default-vlan-id` property. The `default-vlan-id` should only be used on access/hybrid ports to specify which VLAN the untagged ingress traffic is assigned to.

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Versions Compared

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Key

Features

Port Switching

Rule Table

VLAN Example 2 (Trunk and Hybrid Ports)

Management access configuration

Tagged

Untagged

Untagged from tagged port

Inter-VLAN routing

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Page History

Versions Compared

Old Version 64

New Version Current

Key

Features

Port Switching

Rule Table

VLAN Example 2 (Trunk and Hybrid Ports)

Management access configuration

Tagged

Untagged

Untagged from tagged port

Inter-VLAN routing